I2C PROTOCOL INTERVIEW QUESTIONS AND ANSWERS PDF

What do you mean by I2C communication? Explain with its diagram. It is two wire i. It is single and multi master and slave communication protocol. What is the application of I2C protocol?

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This type of framing differentiates one byte from another. Most LANs use bit-oriented framing. There is usually a maximum frame size. For example, Ethernet has a maximum frame size of 1, bytes. The beginning and end of a frame is signaled with a special bit sequence for HDLC.

If no data is being transmitted, this same sequence is continuously transmitted so the end systems remain synchronized. SONET Synchronous Optical Network is a synchronous system in which all the clocks in the network are synchronized back to a master clock reference.

SONET frames are then positioned within the clocked stream. What is the maximum distance of the I2C bus? This depends on the load of the bus and the speed you run at. In typical applications, the length is a few meters ft. Another thing to be taken into account is the amount of noise picked up by long cabling. This noise can disturb the signal transmitted over the bus so badly that it becomes unreadable. The length can be increased significantly by running at a lower clock frequency.

One particular application — clocked at about Hz — had a bus length of about m ft. If you need to go far at high speed, you can use an active current source instead of a simple pull-up resistor. Philips has a standalone product for this purpose. Is there something like a repeater for I2C? Yes indeed this exists. Philips manufactures a special chip to buffer the bi-directional lines of the I2C bus. Typically, this is a current amplifier.

That way you can overcome the capacitance of long wiring. However, you will need this component on both sides of the line. The charge pump in this devices can deliver currents up to 30mA which is way too much for a normal I2C chip to handle. With these buffers you can handle loads up to 2nF. Difference between spi and i2c? SPI generally requires additional Chip Select signals. This enables multiple processes to share a single CPU resource.

The context switch is an essential feature of a multitasking operating system. Context switches are usually computationally intensive and much of the design of operating systems is to optimize the use of context switches.

A context switch can mean a register context switch, a task context switch, a thread context switch, or a process context switch.

What constitutes the context is determined by the processor and the operating system. Switching from one process to another requires a certain amount of time for doing the administration — saving and loading registers and memory maps, updating various tables and list etc. Interrupts An interrupt is an event in hardware that triggers the processor to jump from its current program counter to a specific point in the code.

Interrupts are designed to be special events whose occurrence cannot be predicted precisely or at all. The MSP has many different kinds of events that can trigger interrupts, and for each one the processor will send the execution to a unique, specific point in memory.

Each interrupt is assigned a word long segment at the upper end of memory. This is enough memory for a jump to the location in memory where the interrupt will actually be handled.

Interrupts in general can be divided into two kinds- maskable and non-maskable. A maskable interrupt is an interrupt whose trigger event is not always important, so the programmer can decide that the event should not cause the program to jump. A non-maskable interrupt like the reset button is so important that it should never be ignored. The processor will always jump to this interrupt when it happens. Often, maskable interrupts are turned off by default to simplify the default behavior of the device.

Special control registers allow non-maskable and specific non-maskable interrupts to be turned on. Thus if a peripheral timer goes off at the same time as the reset button is pushed, the processor will ignore the peripheral timer because the reset is more important higher priority. ISRs examine an interrupt and determine how to handle it. ISRs handle the interrupt, and then return a logical interrupt value.

An ISR must perform very fast to avoid slowing down the operation of the device and the operation of all lower priority ISRs. Share this:.

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Embedded Interview Questions

Can devices be added and removed while the system is running Hot swapping in I2C? Ans: Hot swapping is possible in I2C protocol. What is the standard bus speed in I2C? Ans: a. But practically depends on Capacitance load. If capacitance load is increase the speed will be reduced What are the 2 roles of nodes in I2C communication?

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Questions and answers what i have faced in interview… on I2C and SPI protocols

What is I2C communication? I2C is a serial communication protocol. It is not only used with the single board but also used with the other external components which have connected with boards through the cables. I2C is basically a two-wire communication protocol. It uses only two wire for communication. In I2C, both buses are bidirectional, which means master able to send and receive the data from the slave.

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I2C Interview Questions, You should know

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